In the manufacturing processes of a semiconductor, the stability of the yield and the increase of the yield due to reducing discrepancies of the device to be manufactured are desirable.
In contrast, there is a manufacturing apparatus of an electronic device in which the ceiling of the chamber includes quartz glass; and the average surface roughness of a micro uneven portion formed in the inner surface of the ceiling is 0.2 to 5 μm (Patent Document 1). Also, there is a plasma-resistant member, in which pores and grain boundary layers do not exist, that suppresses/reduces the occurrence of particle detachment from the plasma-resistant member (Patent Document 2).
To increase the yield by reducing the discrepancies of the device to be manufactured in the manufacturing processes of the semiconductor, the occurrence of particles is reduced by coating an yttria film having excellent plasma resistance on the inner wall of the chamber. Further, recently, pattern downscaling of the semiconductor device is advancing; and the stable control of nanolevel particles is desirable.